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DDR3 and 8ch GTP Evaluation Platform

TB-6V-LX760-LSI

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Part Number: TB-6S-LX150T-IMG2

The "TB-6S-LX150T-IMG2" provides a flexible development environment for higher-level system design including applications which need to implement features such as high-speed serial transceivers and DDR3.
The TB-6S-LX150T-IMG2 development board includes an industry-standard FMC (FPGA Mezzanine Card) connector for scaling and customization to specific applications and markets.
The integration of TED development tools help streamline the creation of systems that adhere to complex requirements.

  • FPGA
    • Xilinx FPGA: XC6SLX150T-3FFG900 device
  • Memory
    • DDR3 SDRAM 1Gbit x 3
  • FMC Interface *1
    • HPC (8ch GTP I/O, General I/O) x 1
    • LPC (General I/O) x 2
  • Configuration
    • SPI Flash 128 Mbit
  • Interface
    • MMCX clock input
    • USB to PC (via USB-UART conversion device)
    • JTAG
    • Dip Swichi, Push button and LED
  • Documentation
    • Hardware Users Manual
    • Reference Design Guides
    • Schematics
  • Reference Design (Verilog HDL)
    • HDMI Frame Buffer Design
      • HDMI interface design with TB-FMCL-HDMI (sold separately)
      • Memory controller: 800Mbps, 32bit data width,Generated by Memory Interface Generator (MIG)
    • EDK Base System Builder Design
      • XDB file for EDK base system builder
      • MicroBlaze softcore CPU and peripherals
  • Power
  • Board size
    • 240mmx175mm

*1) Not all VITA57.1 signals are populated.

TB-6S-LX150T-IMG2
Part number TB-6S-LX150T-IMG2
Deliverables

RoHS compliant Spartan-6 LX150T video evaluation base board

Documentation*2:

  • Hardware Users Manual
  • Reference Design Guides
  • Schematics

Reference Design (Verilog HDL) *2

  • HDMI Frame Buffer Design
  • EDK Base System Builder Design

AC Adapter

*2 Note) Data is provided from TED Support Web site. (TED Support Web is a site only for purchaser.)

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