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Kintex-7 FPGA ACDC 1.0 Base Board

TB-6V-LX760-LSI

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Part Number: TB-7K-325T-IMG

The TB-7K325T-IMG Kintex-7® FPGA ACDC 1.0 Base Board allows you to test your 12.5 Gbps serial I/O designs and 64-bit x 1,866Mbps memory interface designs on the world's rst 28nm FPGA from Xilinx, the Kintex-7 FPGA. Realize your solution faster than ever using our reference designs based on industry standard high-bandwidth interfaces (created with FMC cards) that take advantage of the new memory Kintex-7 FPGA memory controller innovations.
Connectivity, scalability, and exibility make this board your multi-project, revolutionary innovation platform.

  • FPGA
    • Xilinx FPGA: XC7K325T-FFG900E device
  • Memory
    • DDR3 SDRAM (2Gbit) x 4
  • FMC Interface *1
    • HPC (High Pin Count) x 2
    • LPC (Low Pin Count) x 2
  • Configuration
    • Via QUAD SPI Flash (128Mbit)
  • High speed Serdes Transceiver
    • 12.5Gbps (GTX) 16ch or 8ch x 2 (HPC) through FMC-HPC
  • On Board CLK
    • 74.25MHz OSC (via Socket)
    • 135MHz OSC
    • 200MHz OSC
    • PLL
  • Interface
    • MMCX for External Clock
    • UART(RS-232C D-sub9pin)
    • XADC Pin header
    • Push SW, DIP SW and LED
    • JTAG
  • Documentation
    • Hardware Users Manual
    • Reference Design Guides
    • Schematics
  • Reference Design (Verilog HDL)
    • HDMI Frame Buffer Design
      • HDMI interface design with TB-FMCH-HDMI2 (sold separately)
      • Memory controller: Generated by Memory Interface Generator (MIG)
    • EDK Base System Builder Design
      • XBD file for EDK base system builder
      • MicroBlaze softcore CPU and peripherals
  • Power
  • Board size
    • 240mmx175mm

*1) Not all VITA57.1 signals are populated.

TB-7K-325T-IMG
Part number TB-7K-325T-IMG
Deliverables

RoHS compliant Kintex-7 K325T ACDC1.0 base board

Documentation*1:

  • Hardware Users Manual
  • Reference Design Guides
  • Schematics

Reference Design (Verilog HDL) *1

  • HDMI Frame Buffer Design
    • HDMI interface design with TB-FMCH-HDMI2 (sold separately)
    • Memory controller: Generated by Memory Interface Generator (MIG)
  • EDK Base System Builder Design
    • XBD file for EDK base system builder
    • MicroBlaze softcore CPU and peripherals

AC Adapter

*1 Note) Data is provided from TED Support Web site. (TED Support Web is a site only for purchaser.)

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